A multi-chip module can provide a high performance at a low cost, by mounting different types of semiconductor devices on a circuit board. A known circuit board for such a multi-chip module is mounted with semiconductor chips of logic circuits, memories such as DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory), or the like. These semiconductor chips may employ a design in which electrodes are arranged at a high density in one region and the electrodes are arranged at a low density in another region. In order to cope with the design of such semiconductor chips, a high-density region in which pads for connecting to the electrodes of the semiconductor chips are arranged at a high density, and a low-density region in which pads for connecting to the electrodes of the semiconductor chips are arranged at a low density, coexist on a single wiring board, as proposed in Japanese Laid-Open Patent Publication No. 2014-183085, for example.
In addition, because high reliability is required of the proposed circuit board, the pads are surface-treated. Generally, the surface treatment forms a plated layer on the pads by electroless plating that is unlikely to be subjected to design restrictions.
In a case in which the plated layer is formed by the electroless plating on the pads that are arranged at a constant density (or constant pitch) on the wiring board, it is possible to perform a uniform plating on all of the pads by adjusting plating conditions.
However, when the high-density region in which the pads for connecting to the electrodes of the semiconductor chips are arranged at the high density, and the low-density region in which the pads for connecting to the electrodes of the semiconductor chips are arranged at the low density, coexist on the single wiring board, deposition by the plating is difficult with respect to the pads in the low-density region if the plating conditions are adjusted for the high-density region. On the other hand, the plated layer may protrude between adjacent pads and cause a short-circuit in the high-density region if the plating conditions are adjusted for the low-density region.
In other words, it is difficult to adjust the plating conditions to become optimum for both the high-density region and the low-density region.